ANSI INCITS TR-28-2002 pdf download Information Technology – SCSI Domain Validation (SDV)
5 Domain examination
5.1 General Examination of the domain includes determining the topology of the domain, the performance of the SCSI bus segments within the domain, and the relative operating analog margins. This examination is accomplished by communicating with the SCSI devices and expanders that comprise the domain and analyzing the results. This information may be reported to the user for further processing. This examination is performed when the domain changes, either by the removal or insertion of components or whenever system initialization occurs. It may also be performed when requested by an application.
5.2 Topology discovery Determining the topology of the domain involves identifying the valid SCSI addresses and their relationship to each other and to expanders within a domain. This assumes that the basic physical connections are intact and the rules outlined in SCSI Parallel Interface-4 are followed.
5.3 Assumptions
Testing methods assumes the following:
a) Topology discovery, including the ability of specific devices to support Margin testing, is left to the application;
b) devices capable of any synchronous SCSI transfer rate are tested;
c) devices that do not have variable analog driver and receiver settings should reject or ignore the attempt to change the settings (i.e., do not hang the SCSI bus segment);
d) all devices were set (e.g., through firmware) to allow their maximum synchronous SCSI transfer rate; and
e) settings negotiated during Enhanced testing remain in effect during Margin testing.
5.4 Data patterns
Recommended data patterns for the Enhanced test are:
a) counting (0001 h, 0203h, 0405h,…);
b) alternating ones and zeros (0000h, FFFFh, 0000h, FFFFh,…);
c) cross-talk (5555h, AAAAh, 5555h, AAAAh, …);
d) shifting bit (0000h, FFFEh, 0000h, FFFDh,…then FFFFh, 0001 h, FFFFh, 0002h,…); and
e) user defined pattern (e.g., psuedo random pattern).
5.5 Test descriptions
5.5.1 Test order
The following test order is recommended for each target.
1 ) perform Basic tests (see 5.3.1 ); and
2) perform Enhanced tests (see 5.3.2).
The direction of P_CRCA during writes differs during ST data phases (initiator to target) and DT data phases (target to initiator), although it is the same for reads (target to initiator). To avoid bus contention, support for DT should be confirmed with the Basic test (which only uses reads) before running the Enhanced test with any transfer rate using DT data phases.